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RED PDSP2110 YELLOW PDSP2111 HIGH EFFICIENCY RED PDSP2112 GREEN PDSP2113 HIGH EFFICIENCY GREEN PDSP2114 0.200" 8-Character, 5x7 Dot Matrix Parallel Input Alphanumeric Intelligent DisplayTM
Package Dimensions in inches (mm) 1.680 (42.67) max. 0.210 (5.34) 0.105 (2.67) 0.771 (19.58) 0.386 (9.8) Pin 1 Indicator Part Number EIA Date Code PLCD558X SIEMENS WW Z 1 0.160.020 (4.06.50) 0.012 (0.30) typ. Intensity Code Color Bin (For Yellow Only) 0.209 (5.31) 0.086 (2.19)
0.189 (4.81)
0.600 (15.24)
FEATURES * Eight 0.200" Dot Matrix Characters in Red, Yellow, High Efficiency Red, Green, High Efficiency Green * Built-in 2 Page, 256 Character ROM. Both pages are Mask Programmable for Custom Fonts * Readable from 8 Feet (2.5 meters) * Built-in Decoders, Multiplexers and Drivers * Wide Viewing Angle, X Axis 55, Y Axis 65 * Programmable Features: - Individual Flashing Character - Full Display Blinking - Multi-Level Dimming and Blanking - Clear Function - Lamp Test * Internal or External Clock * End Stackable Dual-In-Line Plastic Package
0.189 (4.79)
0.018 typ. (.46)
0.100 (2.54) typ.
Description The PDSP2110 (Red), PDSP2111 (Yellow), PDSP2112 (High Efficiency Red), PDSP2113 (Green), PDSP2114 (High Efficiency Green), and PDSP2115 (Soft Orange) are eight digit, 5x7 dot matrix, parallel input, alphanumeric Intelligent Displays. The 0.20 inch high digits are packaged in a rugged, high quality, optically transparent, 0.6 inch lead spacing, 28 pin plastic DIP. The on-board CMOS has a built-in 256 character ROM. Both pages are mask programmable for 256 custom characters.The first page of ROM of a standard product contains 128 characters including ASCII, selected European and Scientific symbols. The second page contains Katakana Japanese characters, more European characters, Avionics, and other graphic symbols. The PSP211X is designed for standard microprocessor interface techniques, and is fully TTL compatible. The Clock I/O and Clock Select pins allow the user to cascade multiple display modules.
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Maximum Rating, DC Supply Voltage, VCC to GND .............. -0.5 to +7.0 Vdc Input Voltage Levels Relative to Ground .......................................-0.5 to VCC + 0.5 Vdc Operating Temperature ............................. -40C to +85C Storage Temperature ................................ -40C to +100C Maximum Solder Temperature 0.063" below seating plane, t<5 sec) ............................... 260C Relative Humidity at 85C............................................ 85%
Note: Maximum voltage is with no LEDs illuminated
Switching Specifications (over operating temperature range and VCC=4.5 V) Symbol Tbw Tacc(2) Tas Tces Tah Tceh Description Time Between Writes Display Access Time Address Setup Time Chip Enable Setup Time Address Hold Time Chip Enable Hold Time Write Active Time Data Valid Prior to Rising Edge of Write Data Hold Time Reset Active Time Clear Cycle Time Min. 30 130 10 0 20 0 100 50 20 300 3 Units ns ns ns ns ns ns ns ns ns ns s
Enlarged Character Font Dimensions in inches (mm)
0.112 (2.85) C1 C2 C3 C4 C5 0.030 (0.76) Typ. R1 R2 R3 0.01 (0.254) R4 R5 R6 R7 0.026 (0.65) Typ. 0.189 (4.81)
Tw Tds Tdh Trc(1) Tclr(3)
1. Wait 300 ns min. after the reset function is turned off. 2. Tacc=Tas + Tw + Tah 3. The Clear Cycle Time may be shortened by writing a second Control Word with the Clear Bit disabled, 160 ns after the first control word that enabled the Clear Bit. data write control word-clear bit enabled wait wait 130 ns data write control word-clear bit enabled
Write Cycle Timing Diagram
Tacc Tas FL, A3-A0 Tah
see Notes
CE see Notes Tces WR see Notes Tw D7-D0 Tdh Tds Tbw see Notes
*Notes: 1. All input voltages are (VIL=0.8 V, VIH=2.0 V). 2. These wave forms are not edge triggered. 3. Tbw=Tas + Tah
Tceh
PDSP2110/1/2/3/4
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Optical Characteristics at 25C, VCC=5.0 V at Full Brightness Red PDSP2110
Description Symbol Min. Typ. Units
Peak Luminous Intensity(1) Peak Wavelength Dominant Wavelength Yellow PDSP2111
Description
IVpeak
(peak) (d)
70
90 660 639
cd/dot nm nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity(1) Peak Wavelength Dominant Wavelength High Efficiency Red PDSP2112
Description
IVpeak
(peak) (d)
130
210 583 585
cd/dot nm nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity(1) Peak Wavelength Dominant Wavelength Green PDSP2113
Description
IVpeak
(peak) (d)
150
330 630 626
cd/dot nm nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity(1) Peak Wavelength Dominant Wavelength High Efficiency Green PDSP2114
Description
IVpeak
(peak) (d)
150
260 565 570
cd/dot nm nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity(1) Peak Wavelength Dominant Wavelength
IVpeak
(peak) (d)
200
510 568 574
cd/dot nm nm
Note 1. Peak luminous intensity is meaaured at TA=TJ=25C. No time is allowed for the device to warm up prior to measurement.
PDSP2110/1/2/3/4
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Electrical Characteristics at 25C
Limits Parameters Min. Typ. Max. Units Conditions
VCC ICC Blank ICC 8 digits(1) 12 dots/character ICC 8 digits(1) 20 dots/character IIP Current (with pull-up) I, Input Leakage Current (no pull-up) VIH Input Voltage High VILInput Voltage Low VOL VOH IOH IOL JC Output Voltage Low (Clock Pin) Output Voltage High (Clock Pin) Output Current High (Clock I/O) Output Current Low (Clock I/O) Thermal Resistance Junction to Case
4.5
5.0 0.5 200 300 11
5.5 1.0 255 370 18 1
V mA mA mA A A V V V V mA VCC=5 V, VIN=5 V VCC=5 V, "V" displayed in all eight digits VCC=5 V, "#" displayed in all eight digits VCC=5 V, VIN=0 V to VCC, (WR, CE, FL, RST, CLKSEL) VCC=5 V,VIN=0 V to VCC, (Clk I/O, A0-A3, D0-D7) VCC=4.5 V to 5.5 V VCC=4.5 V to 5.5 V VCC=4.5 V to 5.5 V, IOL=1.6 mA VCC=4.5 V to 5.5 V, IOH=40mA VCC=4.5 V, VOH=-2.4 V VCC=4.5 V, VOL=-0.4 V
2.0 GND -0.3
VCC +0.3 0.8 0.4
2.4 -0.9 1.6 2 25 28 28 81.14 81.14 240 500 500 125 0.98 256 2 362.5 2.83
mA C/W KHz KHz pF ns ns Hz Hz
FEXT External Clock Input Frequency (2) FOSC Internal Clock Output Frequency (2) Clock I/O Buss Loading Clock Out Rise Time Clock Out Fall Time FM, Digit Multiplex Frequency Blinking Rate
VCC=5.0 V, CLKSEL=0 VCC=5.0 V, CLKSEL=1
VCC=4.5 V, VOH=2.4 V VCC=4.5 V, VOL=0.4 V
Note: 1. Average ICC measured at full brightness. Peak ICC=2 X IAVG ICC (# displayed). 2. Internal/external frequency duty factor is 50%.
PDSP2110/1/2/3/4
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Top View
28 Pins 15
Pin Definitions
Pin 1 2
0 1 2 3 Digit 1 Pins 14 4 5 6 7
Function
Definition Used for initiallization of a display and sychronization of blinking for multiple displays Low input accesses the Flash RAM Address input LSB Address input Address input MSB Mode selector Used to bias IC substrate, must be connected to VCC. Can't be used to supply power to display.
RST FL
A0 A1 A2 A3 Substr. bias
3 4 5 6 7
Pin Assignments
Pin Function Pin Function
8 9 10 11 12 13 14 15 No connect
1 2 3 4 5 6 7 8 9 10 11 12 13 14
RST FL A0 A1 A2 A3 Substr. bias
28 27 26 25 24 23 22 21 20
D7 D6 D5 D4 D3 D2 No Pin
CLKSEL
CLK I/O
Selects internal/external clock source Ouputs master clock or inputs externa l clock A low will write data into the display if CE is low Positive power supply input Analog Ground for LED drivers Digital Ground for internal logic Enables access to the display
WR
VCC GND GND
D1 D0 No Connect CE GND (logic) GND (supply)
16 17 18 19 20 21 22 23 24 25 26 27 28
No Connect CLKSEL CLK I/O WR VCC
19 18 17 16 15
CE
No Connect D0 D1 No pin D2 D3 D4 D5 D6 D7
Data input LSB Data input
Data input
Data input MSB, selects ROM, page 1 or 2
Cascading the PDSP211X Displays
RD WR FL RST VCC RD WR FL RST CLK I/O CLKSEL Up to14 More Displays in between RD WR FL RST CLK I/O CLKSEL
PDSP2110/1/2/3/4S D0-D7 A0-A4
Data I/O Address
PDSP2110/1/2/3/4S D0-D7 A0-A4 CE
CE
A6 A7 A8 A9
0 Address Decoder Address Decode Chip 1 to 14 15
PDSP2110/1/2/3/4
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Character Set ROM Page 1 (D7 = 0)
ROM Page 2 (D7 = 1)
PDSP2110/1/2/3/4
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Block Diagram
Rows 0 to 13
0 1 2
DISPLAY
3 4 5 6 7
Row Control Logic & Row Drivers
RST CLK I/O CLKSEL OSC / 32 Counter /7 Counter Blink / 128 Rate Counter Mux Rate
Columns 0 to 19
D7 Column Decoder D6 D5 D4 D3 D2 D1 D0
Timing and Control Logic
Control Word
Row Decoder ROM 1 ROM 2
128x7 Bit ASCII Character Decode (4.48K Bits) 128x7 Bit Column ASCII Character Data Decode (4.48K Bits)
Master Slave Latches Digit 0 to 8
8 x 8 Bits Address Lines
7 Bit ASCII Code Flash RAM
(8 x 1 Bit)
Address Decoder A0 A1 A2 A3 WR CE FL
Functional Description
The PDSP211X block diagram is comprised of the following major blocks and registers. Display Memory consists of a 8x8 bit RAM block. Each of the eight 8-bit words holds the 7-bit ASCII data (bit D0-D6). The 8th bit, D7 selects 1 of the 2 pages of character ROM. D7=0 selects Page 1 of the ROM and D7=1 selects Page 2 of the ROM. A3=1. RST can be used to initialize display operation upon power up or during normal operation. When activated, RST will clear the Flash RAM and Conrol Word Register (00H) and reset the internal counter. All eight display memory locations will be set to 20H to show blanks in all digits. FL pin enables access to the Flash RAM. The Flash RAM will set (D0=1)or reset (D0=0) flashing of the character addressed by A0-A2. The 1x8 bit Control Word RAM is loaded with attribute data if A3=0. The Control Word Logic decodes attribute data for proper implementation. Character ROM is designed for two pages of 128 characters each. Both pages of the ROM are Mask Programmable for custom fonts. On the standard product page one contains standard ASCII, selected European characters and some scientific symbols. Page two contains Katakana characters, more European characters, avionics, and other graphic symbols. The Clock Source could either be the internal oscillator (CLKSEL=1) of the device or an external clock (CLKSEL=0) could be an input from another PDSP211X display for the synchronization of blinking for multiple displays.
PDSP2110/1/2/3/4
Latches
Display Memory
Control Word Decode Logic
Column Drivers for Digit 0 to 8
The Display Multiplexer controls the Row Drivers so no additional logic is required for a display system. The Display has eight digits. Each digit has 35 LEDs clustered into a 5x7 dot matrix. Theory of Operation The PDSP211X Programmable display is designed to work with all major microprocessors. Data entry is via an eight bit parallel bus. Three bits of address route the data to the proper digit location in the RAM. Standard control signals like WR and CE allow the data to be written into the display. D0 - D7 data bits are used for both ASCII and control word data input. A3 acts as the mode selector. If A3=0, D0 - D7 load the RAM with control word data. If A3=1, D0 - D7 will load the RAM with ASCII and page select data. In the later mode, D7=0 selects Page 1 of Character ROM and D7=1 selects Page 2 of Character ROM. For normal operation FL pin should be held high. When FL is held low, Flash RAM is accessed to set character blinking. The seven bit ASCII code is decoded by the Character ROM to generate Column data. Twenty columns worth of data is sent out each display cycle and it takes fourteen display cycles to write into eight digits. The rows are being multiplexed in two sets of seven rows each. The internal timing and control logic synchronizes the turning on of rows and presentation of column data to assure proper display operation.
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Data Input Commands Signals CE 1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WR X 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 FL X X 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 A3 X X 0 1 1 1 1 1 1 1 1 X X X X X X X X A2 X X 0 0 0 0 0 1 1 1 1 0 0 0 1 1 1 1 1 A1 X X 0 0 0 1 1 0 0 0 1 0 0 1 1 0 0 1 1 A0 X X 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Operation No operation No operation Write Control Register Digit 0 (left) Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 (right) Digit 0 (left) Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 (right) Write display data to user RAM and Page Select Register
D0-D6=ASCII Data D7=0 Select ROM 1 D7=1 Select ROM 2 Write Flash RAM Register
D0=0 Flashing Charac. off D0=1 Flashing Charac. on D1-D7=X
X = Don't care
Power up Sequence Upon power up display will come on at random. Thus the display should be reset on power-up. The reset will clear the Flash RAM, Control Word Register and reset the internal counter. All the digits will show blanks and display brightness level will be 100%. Microprocessor Interface The interface to a micrprocessor is through the 8-bit data bus (D0-D7), the 4-bit address bus (A0-A3) and control lines FL, CE and WR. To write data (ASCII/ Control Word) into the display CE should be held low, address and data signals stable and WR should be brought low. The Control Word is decoded by the Control Word Decode Logic. Each code has a different function. The code for display brightness changes the duty cycle for the column drivers. The peak LED current stays the same but the average LED current diminishes depending on the intensity level. The character Flash Enable causes 2 Hz coming out of the counter to be ANDED with column drive signal and makes the column driver to cycle at 2 Hz. Thus the character flashes at 2 Hz. The display Blink works the same way as the Flash Enable but causes all twenty column drivers to cycle at 2 Hz thereby making all eight digits to blink at 2 Hz. The Lamp Test causes the column drivers to run at 1/2 duty cycle thus all the LEDs in all eight digits turn on at 50% intensity. Clear bit clears the character RAM and writes a blank into the display memory. It however does not clear the control word. ASCII Data or Control Word Data can be written into the display at this point. For multiple display operation, CLK I/O must be properly selected. CLK I/O will output the internal clock if CLKSEL=1, or will allow input from an external clock if CLKSEL=0.
PDSP2110/1/2/3/4
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Control Word Format
Display Brightness The display can be programmed to vary between blank, 13%, 20%, 27%, 40%, 53%, 80% and full brightness. Bits D0, D1 and D2 control the display brightness. CE WR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FL 1 1 1 1 1 1 1 1
A3 A2 0 0 0 0 0 0 0 0 X X X X X X X X
A1 X X X X X X X X
A0 X X X X X X X X
D7 D6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D5 X X X X X X X X
D4 X X X X X X X X
D3 X X X X X X X X
D2 0 0 0 0 1 1 1 1
D1 0 0 1 1 0 0 1 1
D0 0 1 0 1 0 1 0 1
Display Brightness 100% Brightness 80% Brightness 53% Brightness 40% Brightness 27% Brightness 20% Brightness 13% Brightness Blank Display
X = Don't Care Flash RAM Function Character Flash is controlled by FL pin, bit D0 and control word bit D3. Combination of FL being low, proper digit address and D0 being high will write a flash bit into the Flash RAM Register. In the control word mode when D3 is brought high, the above mentioned character will flash. Setting the Flash Bit CE 0 0 WR FL 0 0 0 0 A3 A2 X X A A A1 A A A0 A A D7 X X D6 X X D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1 Operation Flash RAM Disabled Flash RAM Enabled
X = Don't Care
A = Selected Address
Character Flash Control Word CE 0 0 WR FL 0 0 1 1 A3 A2 0 0 X X A1 X X A0 X X D7 0 0 D6 0 0 D5 X X D4 0 0 D3 0 1 D2 B B D1 B B D0 B B Operation Disable Flashing Character Enable Flashing Character
X = Don't Care
B = Selected Brightness
Display Blinking Blinking Function is independant of Flash function. When D4 is held high, entire display blinks at 2 Hz. CE 0 0 WR FL 0 0 1 1 A3 A2 0 0 X X A1 X X A0 X X D7 0 0 D6 0 0 D5 X X D4 0 1 D3 0 0 D2 B B D1 B B D0 B B Operation Display Blinking Disabled Display Blinking Enabled
X = Don't Care Lamp Test
B = Selected Brightness
Bit D6 when brought high will cause all the LEDs in all eight digits to light up at 53% brightness. Selecting or de-selecting Lamp Test bit has no effect on the display memory. CE 0 0 WR FL 0 0 1 1 A3 A2 0 0 X X A1 X X A0 X X D7 0 0 D6 0 1 D5 X X D4 0 0 D3 X 0 D2 X X D1 X X D0 X X Operation Lamp Test Disabled Lamp Test Disabled
X = Don't Care
PDSP2110/1/2/3/4
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Clear Function Clear function will clear the display. The Flash RAM will be set to all zeros. An ASCII blank code (20H) will be written into the display memory. The user must wait 3 ms or write a new control word to the display with conrol word bit D7 = 0 to disable clear before writing any data to the display memory, otherwise all new data to the display memory will remain cleared. See Switching Specifications for clear function timing. CE WR FL 0 0 0 0 1 1
A3 A2 0 0 X X
A1 X X
A0 X X
D7 0 1
D6 X X
D5 D4 X X X X
D3 X X
D2 X X
D1 X X
D0 X X
Operation Clear Disabled Clear User RAM, Page RAM, Flash RAM and Display
X = Don't Care
Control Word Format D7 Clear Enable D6 Lamp Test D5 Not Used D4 Blink Enable D3 Flash Enable D2 D1 D0
Brightness Control D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Brightness 100% 80% 53% 40% 27% 20% 13% 0% Blank
D3 Flash Enable 0 Disable Flashing Character 1 Enable Flashing Character D4 Blinking Display 0 Disable Blinking Display 1 Enable Blinking Display D6 Lamp Test 0 Disable Lamp Test 1 Enable Lamp Test (all dots on at 53% brightness) D7 Clear Enable 0 Disable Clear 1 Enable Clear (Clear Data RAM, Page RAM, Flash RAM)
PDSP2110/1/2/3/4
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Electrical and Mechanical Considerations
Voltage Transient Suppression For best results power the display and the components that interface with the display to avoid logic inputs higher than VCC. Additionally, the LEDs may cause transients in the power supply line while they change display states. The common practice is to place a parallel combination of a .01 F and a 22 F capacitor between VCC and GND for all display packages. ESD Protection The input protection structure of the PDSP2110/1/2/3/4 provides significant protection against ESD damage. It is capable of withstanding discharges greater than 2 KV. Take all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in antistatic packaging. Soldering Considerations The PDSP2110/1/2/3/4 can be hand soldered with SN63 solder using a grounded iron set to 260C. Wave soldering is also possible following these conditions: Preheat that does not exceed 93C on the solder side of the PC board or a package surface temperature of 85C. Water soluble organic acid flux (except carboxylic acid) or resinbased RMA flux without alcohol can be used. Wave temperature of 245C 5C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260C for five seconds at 0.063" below the seating plane. The packages should not be immersed in the wave. Post Solder Cleaning Procedures The least offensive cleaning solution is hot D.I. water (60C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents. For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package. Maximum exposure should not exceed two minutes at elevated temperatures. Acceptable solvents are TF (trichorotrifluorethane), TA, 111 Trichloroethane, and unheated acetone.(1)
Note: 1. Acceptable commercial solvents are: Basic TF, Arklone, P. Genesolv, D. Genesolv DA, Blaco-Tron TF, Blaco-Tron TA, and Freon TA.
An alternative to soldering and cleaning the display modules is to use sockets. Naturally, 28 pin DIP sockets .600" wide with .100" centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN. For further information refer to Appnote 22 in the current Siemens Optoelectronic Data Book. Optical Considerations The .200" high character of the PDSP211X gives readability up to eight feet. Proper filter selection enhances readability over this distance. Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit ratio for filters. Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The PDSP2110/2112 are red/high efficiency red displays and should be matched with long wavelength pass filter in the 570 nm to 590 nm range. The PDSP2111/2113/2114 should be matched with a yellow-green band-pass filter that peaks at 565 nm. For displays of multiple colors, neutral density grey filters offer the best compromise. Additional contrast enhancement is gained by shading the displays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow. Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the filter and reflects back off the display to less than 1%. Selecting the proper intensity of the displays allows 10,000 foot candle sunlight viewability. Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA. One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA.
PDSP2110/1/2/3/4
Unacceptable solvents contain alcohol, methanol, methylene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES. Since many commercial mixtures exist, contact a solvent vendor for chemical composition information. Some major solvent manufacturers are: Allied Chemical Corporation, Specialty Chemical Division, Morristown, NJ; BaronBlakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilmington, DE. For further information refer to Appnotes 18 and 19 in the current Siemens Optoelectronic Data Book.
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